BEGIN:VCALENDAR
PRODID:-//Microsoft Corporation//Outlook MIMEDIR//EN
VERSION:1.0
BEGIN:VEVENT
DTSTART:20121114T001500Z
DTEND:20121114T020000Z
LOCATION:East Entrance
DESCRIPTION;ENCODING=QUOTED-PRINTABLE:ABSTRACT: Heterogeneous architectures, where a multicore processor, which is optimized for fast single-thread performance, is accompanied with a large number of simpler, but=0Amore power-efficient cores optimized for parallel workloads, are receiving a lot attention recently.=0ACurrently, these co-processors, such as Intel's Many Integrated Core (MIC) software development platform, come with a limited on-board RAM, which requires partitioning computational problems manually into pieces that can fit into the device's memory, and at the same time, efficiently overlapping computation and data movement between the host and the device.=0AIn this poster we present an operating system (OS) assisted hierarchical memory management system.=0AWe are aiming at transparent data movement between the device and the host memory, as well as tight integration with other OS services, such as file and=0Anetwork I/O.
SUMMARY:Operating System Assisted Hierarchical Memory Management for Heterogeneous Architectures
PRIORITY:3
END:VEVENT
END:VCALENDAR
BEGIN:VCALENDAR
PRODID:-//Microsoft Corporation//Outlook MIMEDIR//EN
VERSION:1.0
BEGIN:VEVENT
DTSTART:20121114T001500Z
DTEND:20121114T020000Z
LOCATION:East Entrance
DESCRIPTION;ENCODING=QUOTED-PRINTABLE:ABSTRACT: Heterogeneous architectures, where a multicore processor, which is optimized for fast single-thread performance, is accompanied with a large number of simpler, but=0Amore power-efficient cores optimized for parallel workloads, are receiving a lot attention recently.=0ACurrently, these co-processors, such as Intel's Many Integrated Core (MIC) software development platform, come with a limited on-board RAM, which requires partitioning computational problems manually into pieces that can fit into the device's memory, and at the same time, efficiently overlapping computation and data movement between the host and the device.=0AIn this poster we present an operating system (OS) assisted hierarchical memory management system.=0AWe are aiming at transparent data movement between the device and the host memory, as well as tight integration with other OS services, such as file and=0Anetwork I/O.
SUMMARY:Operating System Assisted Hierarchical Memory Management for Heterogeneous Architectures
PRIORITY:3
END:VEVENT
END:VCALENDAR