SCHEDULE: NOV 10-16, 2012
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An OpenCL Application for FPGAs
SESSION: Heterogeneous Computing II
EVENT TYPE: Exhibitor Forums
TIME: 10:30AM - 11:00AM
Presenter(s):John Freeman
ROOM:155-B
ABSTRACT:
OpenCL is a framework that enables programmers to produce massively parallel software in C. OpenCL has been adopted by CPU and GPU developers as a way to accelerate their hardware by exploiting parallelism on their chip. FPGAs by their nature are fine-grained, massively parallel arrays that process information in a significantly different manner from traditional CPU- or GPU-based systems and are a natural hardware platform to target an OpenCL program. OpenCL and the parallelism of FPGAs enable a new level of hardware acceleration and faster time-to-market for heterogeneous systems. During this presentation, Altera will show how OpenCL is being used by customers to map data parallel algorithms to FPGA-based devices and achieve high-performance FPGA applications in a fraction of the time. We will also show how to transform initial code that is functionally correct into a highly optimized implementation that maximizes the throughput on the FPGA.
Chair/Presenter Details:
John Freeman - Altera
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An OpenCL Application for FPGAs
SESSION: Heterogeneous Computing II
EVENT TYPE:
TIME: 10:30AM - 11:00AM
Presenter(s):John Freeman
ROOM:155-B
ABSTRACT:
OpenCL is a framework that enables programmers to produce massively parallel software in C. OpenCL has been adopted by CPU and GPU developers as a way to accelerate their hardware by exploiting parallelism on their chip. FPGAs by their nature are fine-grained, massively parallel arrays that process information in a significantly different manner from traditional CPU- or GPU-based systems and are a natural hardware platform to target an OpenCL program. OpenCL and the parallelism of FPGAs enable a new level of hardware acceleration and faster time-to-market for heterogeneous systems. During this presentation, Altera will show how OpenCL is being used by customers to map data parallel algorithms to FPGA-based devices and achieve high-performance FPGA applications in a fraction of the time. We will also show how to transform initial code that is functionally correct into a highly optimized implementation that maximizes the throughput on the FPGA.
Chair/Presenter Details:
John Freeman - Altera
Click here to download .ics calendar file