SCHEDULE: NOV 10-16, 2012
When viewing the Technical Program schedule, on the far righthand side is a column labeled "PLANNER." Use this planner to build your own schedule. Once you select an event and want to add it to your personal schedule, just click on the calendar icon of your choice (outlook calendar, ical calendar or google calendar) and that event will be stored there. As you select events in this manner, you will have your own schedule to guide you through the week.
Something New in HPC? EXTOLL: A Scalable Interconnect for Accelerators
SESSION: Interconnect and Advanced Architectures II
EVENT TYPE: Exhibitor Forums
TIME: 3:30PM - 4:00PM
Presenter(s):Prof. Dr. Ulrich Bruening
ROOM:155-C
ABSTRACT:
EXTOLL is a new, scalable and high-performance interconnection network originally developed at the University of Heidelberg. It implements a 3-D torus topology designed for low latency and reliable transmission of messages. Cut-through switching allows for low latency beyond nearest neighbor communication. The feature rich network EXTOLL was selected by the EU-Project DEEP to implement a separate network allowing for the virtualization and aggregation of accelerator resources into a so called Booster. EXTOLL's unique feature of a PCIe root-complex allows for autonomous boot and operation of accelerators within the Booster sub-system.
Chair/Presenter Details:
Prof. Dr. Ulrich Bruening - University of Heidelberg
Click here to download .ics calendar file
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Something New in HPC? EXTOLL: A Scalable Interconnect for Accelerators
SESSION: Interconnect and Advanced Architectures II
EVENT TYPE:
TIME: 3:30PM - 4:00PM
Presenter(s):Prof. Dr. Ulrich Bruening
ROOM:155-C
ABSTRACT:
EXTOLL is a new, scalable and high-performance interconnection network originally developed at the University of Heidelberg. It implements a 3-D torus topology designed for low latency and reliable transmission of messages. Cut-through switching allows for low latency beyond nearest neighbor communication. The feature rich network EXTOLL was selected by the EU-Project DEEP to implement a separate network allowing for the virtualization and aggregation of accelerator resources into a so called Booster. EXTOLL's unique feature of a PCIe root-complex allows for autonomous boot and operation of accelerators within the Booster sub-system.
Chair/Presenter Details:
Prof. Dr. Ulrich Bruening - University of Heidelberg
Click here to download .ics calendar file