SC12 Home > SC12 Schedule > SC12 Presentation - Code Generation for Parallel Execution of a Class of Irregular Loops on Distributed Memory Systems

SCHEDULE: NOV 10-16, 2012

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Code Generation for Parallel Execution of a Class of Irregular Loops on Distributed Memory Systems

SESSION: Runtime-Based Analysis and Optimization

EVENT TYPE: Papers

TIME: 4:00PM - 4:30PM

SESSION CHAIR: Siegfried Benkner

AUTHOR(S):Mahesh Ravishankar, John Eisenlohr, Louis-Noel Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan

ROOM:355-D

ABSTRACT:
Parallelization and locality optimization of affine loop nests has been successfully addressed for shared-memory machines. However, many large-scale simulation applications must be executed in a distributed environment, and use irregular/sparse computations where the control-flow and array-access patterns are data-dependent. In this paper, we propose an approach for effective parallel execution of a class of irregular loop computations in a distributed memory environment, using a combination of static and run-time analysis. We discuss algorithms that analyze sequential code to generate an inspector and an executor. The inspector captures the data-dependent behavior of the computation in parallel and without requiring replication of any of the data structures used in the original computation. The executor performs the computation in parallel. The effectiveness of the framework is demonstrated on several benchmarks and a climate modeling application.

Chair/Author Details:

Siegfried Benkner (Chair) - University of Vienna

Mahesh Ravishankar - Ohio State University

John Eisenlohr - Ohio State University

Louis-Noel Pouchet - Ohio State University

J. Ramanujam - Louisiana State University

Atanas Rountev - Ohio State University

P. Sadayappan - Ohio State University

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Code Generation for Parallel Execution of a Class of Irregular Loops on Distributed Memory Systems

SESSION: Runtime-Based Analysis and Optimization

EVENT TYPE:

TIME: 4:00PM - 4:30PM

SESSION CHAIR: Siegfried Benkner

AUTHOR(S):Mahesh Ravishankar, John Eisenlohr, Louis-Noel Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan

ROOM:355-D

ABSTRACT:
Parallelization and locality optimization of affine loop nests has been successfully addressed for shared-memory machines. However, many large-scale simulation applications must be executed in a distributed environment, and use irregular/sparse computations where the control-flow and array-access patterns are data-dependent. In this paper, we propose an approach for effective parallel execution of a class of irregular loop computations in a distributed memory environment, using a combination of static and run-time analysis. We discuss algorithms that analyze sequential code to generate an inspector and an executor. The inspector captures the data-dependent behavior of the computation in parallel and without requiring replication of any of the data structures used in the original computation. The executor performs the computation in parallel. The effectiveness of the framework is demonstrated on several benchmarks and a climate modeling application.

Chair/Author Details:

Siegfried Benkner (Chair) - University of Vienna

Mahesh Ravishankar - Ohio State University

John Eisenlohr - Ohio State University

Louis-Noel Pouchet - Ohio State University

J. Ramanujam - Louisiana State University

Atanas Rountev - Ohio State University

P. Sadayappan - Ohio State University

Add to iCal  Click here to download .ics calendar file

Add to Outlook  Click here to download .vcs calendar file

Add to Google Calendarss  Click here to add event to your Google Calendar