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PRODID:-//Microsoft Corporation//Outlook MIMEDIR//EN
VERSION:1.0
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DTSTART:20121113T203000Z
DTEND:20121113T210000Z
LOCATION:255-BC
DESCRIPTION;ENCODING=QUOTED-PRINTABLE:ABSTRACT: Take a multicore Digital Signal Processor (DSP) chip=0Adesigned for cellular base stations and radio network controllers,=0Aadd floating-point capabilities to support 4G networks, and out=0Aof thin air a HPC engine is born. The potential for HPC is clear:=0AIt promises 128 GFLOPS (single precision) for 10 Watts; It is=0Aused in millions of network related devices and hence benefits=0Afrom economies of scale; It should be simpler to program than=0Aa GPU. Simply put, it is fast, green, and cheap. But is it easy to=0Ause? In this paper, we show how this potential can be applied to=0Ageneral-purpose high performance computing, more specifically=0Ato dense matrix computations, without major changes in existing=0Acodes and methodologies, and with excellent performance and=0Apower consumption numbers.
SUMMARY:Unleashing the High Performance and Low Power of Multi-Core DSPs for General-Purpose HPC
PRIORITY:3
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