SC12 Home > SC12 Schedule > SC12 Presentation - PATUS for Convenient High-Performance Stencils: Evaluation in Earthquake Simulations

SCHEDULE: NOV 10-16, 2012

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PATUS for Convenient High-Performance Stencils: Evaluation in Earthquake Simulations

SESSION: Autotuning and Search-Based Optimization

EVENT TYPE: Papers

TIME: 11:30AM - 12:00PM

SESSION CHAIR: Francois Bodin

AUTHOR(S):Matthias Christen, Olaf Schenk, Yifeng Cui

ROOM:355-D

ABSTRACT:
Patus is a code generation and auto-tuning framework for the class of stencil computations targeted at modern multi- and many-core processors. The goals of the framework are productivity, portability, and achieving a high performance on the target platform. Its stencil specification DSL allows the programmer to express the computation in a concise way independently of hardware architecture-specific details. Thus, it increases the programmer productivity by disburdening her or him of low level programming model issues. We illustrate the impact of the stencil code generation in seismic applications. The challenges in computational seismology are to harness these stencil-code generation techniques for wave propagation problems, for which weak and strong scaling are important. We evaluate the performance showing two examples: (1) focusing on a scalable discretization of the wave equation, and (2) testing complex simulation types of the AWP-ODC code to enable petascale 3D earthquake calculations and aims on aggressive parallel efficiency.

Chair/Author Details:

Francois Bodin (Chair) - CAPS

Matthias Christen - University of Lugano

Olaf Schenk - University of Lugano

Yifeng Cui - San Diego Supercomputer Center

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PATUS for Convenient High-Performance Stencils: Evaluation in Earthquake Simulations

SESSION: Autotuning and Search-Based Optimization

EVENT TYPE:

TIME: 11:30AM - 12:00PM

SESSION CHAIR: Francois Bodin

AUTHOR(S):Matthias Christen, Olaf Schenk, Yifeng Cui

ROOM:355-D

ABSTRACT:
Patus is a code generation and auto-tuning framework for the class of stencil computations targeted at modern multi- and many-core processors. The goals of the framework are productivity, portability, and achieving a high performance on the target platform. Its stencil specification DSL allows the programmer to express the computation in a concise way independently of hardware architecture-specific details. Thus, it increases the programmer productivity by disburdening her or him of low level programming model issues. We illustrate the impact of the stencil code generation in seismic applications. The challenges in computational seismology are to harness these stencil-code generation techniques for wave propagation problems, for which weak and strong scaling are important. We evaluate the performance showing two examples: (1) focusing on a scalable discretization of the wave equation, and (2) testing complex simulation types of the AWP-ODC code to enable petascale 3D earthquake calculations and aims on aggressive parallel efficiency.

Chair/Author Details:

Francois Bodin (Chair) - CAPS

Matthias Christen - University of Lugano

Olaf Schenk - University of Lugano

Yifeng Cui - San Diego Supercomputer Center

Add to iCal  Click here to download .ics calendar file

Add to Outlook  Click here to download .vcs calendar file

Add to Google Calendarss  Click here to add event to your Google Calendar